Silicon Valley Chapter

Next Meeting: May 8, 2007

RSVP Required

TOPIC: Using Controlled Noise Injection to Find Printed Wiring Board Layout Defects

Board layout problems can cause a wide variety of system problems and 
can sometimes be difficult to find. This talk will cover a method for 
finding problems in a printed wiring board layout without requiring a 
detailed knowledge of the board design or complex engineering concepts. 
The method could be included in testing of a new prototype board to help 
insure a defect free design. Many design and some manufacturing defects 
can be found with this method.

Agenda:
11:45-12:00 >> Sponsors Spotlight
12:00-12:50 >> Featured Speaker: Douglas C. Smith
12:50-1:15 >> Q & A

RSVP Required

Chapter Officers

Bob McCreight, C.I.D.	BobMcCr8@yahoo.com	President
Patrick G. Jabbaz, C.I.D.	patrick@ubnt.com	VP/Secretary
Bob Gillam	robert.gillam@nokia.com	Treasurer

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Cadence Representatives with Bob McCreight

Chapter Sponsors since 2002